S3C2410A - 32-Bit RISC Microprocessor - Samsung semiconductor
OPERAND RESTRICTIONS
• In user mode, the control bits of the CPSR are protected from change, so only the condition code flags of the
CPSR can be changed. In other (privileged) modes the entire CPSR can be changed.
• Note that the software must never change the state of the T bit in the CPSR. If this happens, the processor will
enter an unpredictable state.
• The SPSR register which is accessed depends on the mode at the time of execution. For example, only
SPSR_fiq is accessible when the processor is in FIQ mode.
• You must not specify R15 as the source or destination register.
• Also, do not attempt to access an SPSR in User mode, since no such register exists.
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