K4S641632H-TC75 - 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free - Samsung semiconductor
FEATURES
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock
• Burst read single-bit write operation
• DQM (x4,x8) & L(U)DQM (x16) for masking
• Auto & self refresh
• 64ms refresh period (4K cycle)
K4S640432H-TC(L)75 16Mb x 4 133MHz(CL=3)
K4S640832H-TC(L)75 8Mb x 8 133MHz(CL=3)
K4S641632H-TC(L)60 4Mb x 16 166MHz(CL=3)
K4S641632H-TC(L)70 143MHz(CL=3)
K4S641632H-TC(L)75
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