Features and benefits

DAC1405D750

Dual 14-bit DAC, up to 750 Msps; 4× and 8× interpolating

Rev. 01 — 10 March 2010 Preliminary data sheet

 Dual 14-bit resolution ? IMD3: 76 dBc; fs = 737.28 Msps; 

fo = 140 MHz

 750 Msps maximum update rate ? ACPR: 71 dBc; 2-carrier WCDMA; 

fs = 737.28 Msps; fo = 153.6 MHz

 Selectable 4× or 8× interpolation filters ? Typical 1.2 W power dissipation at 4×

interpolation, PLL off and 740 Msps

 Input data rate up to 185 Msps ? Power-down and Sleep modes

 Very low noise cap-free integrated PLL ? Differential scalable output current from 

1.6 mA to 22 mA

 32-bit programmable NCO frequency ? On-chip 1.25 V reference

 Dual port or Interleaved data modes ? External analog offset control 

(10-bit auxiliary DACs)

 1.8 V and 3.3 V power supplies ? Internal digital offset control

 LVDS compatible clock ? Inverse x / (sin x) function

 Two’s complement or binary offset 

data format

 Fully compatible SPI port

 1.8 V/3.3 V CMOS input buffers ? Industrial temperature range from 

−40 °C to +85 °C

 

 

 

 

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