ISPLSI1032-60LTI
In-System Programmable High Density PLD
Features
HIGH-DENSITY PROGRAMMABLE LOGIC
High Speed Global Interconnect
6000 PLD Gates
64 I/O Pins, Eight Dedicated Inputs
192 Registers
Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc.
Small Logic Block Size for Fast Random Logic
Security Cell Prevents Unauthorized Copying
HIGH PERFORMANCE E2
CMOS®
TECHNOLOGY
fmax = 90 MHz Maximum Operating Frequency
fmax = 60 MHz for Industrial and Military/883 Devices
tpd = 12 ns Propagation Delay
TTL Compatible Inputs and Outputs
Electrically Erasable and Reprogrammable
Non-Volatile E2
CMOS Technology
100% Tested
ispLSI OFFERS THE FOLLOWING ADDED FEATURES
In-System Programmable™ (ISP™) 5-Volt Only
Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality
Reprogram Soldered Devices for Faster Prototyping
COMBINES EASE OF USE AND THE FAST SYSTEM
SPEED OF PLDs WITH THE DENSITY AND FLEX-
IBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
Complete Programmable Device Can Combine Glue
Logic and Structured Designs
Four Dedicated Clock Input Pins
Synchronous and Asynchronous Clocks
Flexible Pin Placement
Optimized Global Routing Pool Provides Global
Interconnectivity
ispLSI AND pLSI DEVELOPMENT TOOLS
pDS®
Software
Easy to Use PC Windows™ Interface
Boolean Logic Compiler
Manual Partitioning
Automatic Place and Route
Static Timing Table
ispDS+™ Software
Industry Standard, Third Party Design
Environments
Schematic Capture, State Machine, HDL
Automatic Partitioning and Place and Route
Comprehensive Logic and Timing Simulation
PC and Workstation Platforms
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