Features

True dual-ported memory cells that allow simultaneous access 

of the same memory location

 4, 8, or 16K × 16 organization 

 Ultra Low operating power 

 Active: ICC = 15 mA (typical) at 55 ns

 Standby: ISB3 = 2 μA (typical)

 Small footprint: Available in a 6x6 mm 100-pin Pb-free vfBGA

 Port independent 1.8V, 2.5V, and 3.0V IOs

 Full asynchronous operation

 Automatic power down

 Pin select for Master or Slave

 

 Expandable data bus to 32 bits with Master or Slave chip select 

when using more than one device

 On-chip arbitration logic

 Semaphores included to permit software handshaking 

between ports 

 Input read registers and output drive registers

 INT flag for port-to-port communication

 Separate upper-byte and lower-byte control

 Industrial temperature ranges 

 

 

 

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