SA5522 Datasheet (PDF) - NXP Semiconductors
• Complete 1.4 GHz single chip system
• Three PNP band switch buffers (20 mA)
• Four bus-controlled bidirectional ports (NPN
open-collector outputs); only one port in 16-pin version
• 33 V tuning voltage output
• In-lock detector
• 5-step ADC
• Mixer-Oscillator (M/O) band switch output
• 15-bit programmable divider
• Programmable reference divider ratio (512, 640
or 1024)
• Programmable charge-pump current (50 or 250 µA)
• Varicap drive disable
• I
2C-bus format
– address plus 4 data bytes transmission (write mode)
– address plus 1 status byte transmission (read mode)
– three independent addresses
• Low power and low radiation.
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