N28F001BX-T120
1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
High-Integration Blocked Architecture
One 8 KB Boot Block w/Lock Out
Two 4 KB Parameter Blocks
One 112 KB Main Block
100,000 Erase/Program Cycles Per
Block
Simplified Program and Erase
Automated Algorithms via On-Chip
Write State Machine (WSM)
SRAM-Compatible Write Interface
Deep Power-Down Mode
0.05 mA ICC Typical
0.8 mA IPP Typical
12.0V g5% VPP
High-Performance Read
70/75 ns, 90 ns, 120 ns, 150 ns
Maximum Access Time
5.0V g10% VCC
Hardware Data Protection Feature
Erase/Write Lockout during Power
Transitions
Advanced Packaging, JEDEC Pinouts
32-Pin PDIP
32-Lead PLCC, TSOP
ETOXTM II Nonvolatile Flash
Technology
EPROM-Compatible Process Base
High-Volume Manufacturing
Experience
Extended Temperature Options
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