Complies with Open LDI Specification for Digital Display Interfaces

25 to 85 MHz Input Clock Support

Supports VGA through UXGA Panel Resolution

Power-down mode <198uW max (TBD)

Two-wire Serial Communication Interface up to 400KHz

Narrow Bus reduces cable size and cost

Up to 4.76 Gbps bandwidth in dual 24-bit RGB into Dual Pixel Out applications

Up to 592Mbytes/sec bandwidth

Dual 12-bit double pumped digital input port

PLL requires no external components

Support both LVTTL and low voltage level input (Capable of 1.0 to 1.8V)

Programmable input clock and control strobe select

Compatible with TIA/EIA-644

2.24 to 2.75 supply voltage

TQFP-100 Thin Quad Flat package

 

 

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