Microprocessor Reset Circuits

With Adjustable Delay Time

 

 

Description 

The FP6801 asserts a reset signal whenever the VDD 

supply voltage declines below a preset threshold. 

The reset threshold voltage is fixed internally with an 

accuracy of ± 2.0%. A time delayed reset can be 

accomplished with the addition of an external 

capacitor. 

The output reset signal is set to be active low. That 

means when the power supply voltage is lower than 

reset threshold, the OUT pin will turn low. 

FP6801 has two different output forms, CMOS 

output and N-channel open-drain output. It is 

available in space-saving SC-82 and SOT-23-5 

packages.

 

 

 

Features 

 Precision Monitoring of 2.5V, 3.0V, 3.3V, and 5.0V 

Power Supply Voltages 

 Ultra-Low Supply Current at 2.5µA Typ. 

 Operating Voltage Range from 1V to 5.5V 

 ± 2.0% Reset Threshold Accuracy 

 Reset Threshold Hysteresis: 5% Typ. 

 Active Low Output 

 Adjustable Delay Time 

 Small Package :SC-82 and SOT-23-5 

 RoHS Compliant 

 

 

Applications 

 TFT-LCD Panels 

 Battery Powered Equipments 

 Microprocessor Power Supply Monitoring 

 Embedded Systems 

 Automotive 

 

 

 

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