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WM8804
Digital Interface Transceiver with PLL
FEATURES
S/PDIF (IEC60958-3) compliant.
Advanced jitter attenuating PLL with low intrinsic period
jitter of 50 ps RMS.
S/PDIF recovered clock using PLL, or stand alone crystal
derived clock generation.
Supports 10 – 27MHz crystal clock frequencies.
2-wire / 3-Wire serial or hardware control interface.
Programmable audio data interface modes:
I2S, Left, Right Justified or DSP
16/20/24 bit word lengths
1 channel receiver input and 1 channel transmit output.
Auto frequency detection / synchronisation.
Selectable output status data bits.
Up to 3 configurable GPO pins.
De-emphasis flag output.
Non-audio detection including DOLBY
TM and DTS
TM
Channel status changed flag.
Configurable clock distribution with selectable output
MCLK rate of 512fs, 256fs, 128fs and 64fs.
2.7 to 3.6V digital and PLL supply voltages.
20-lead SSOP package.
APPLICATIONS
AV processors and Hi-Fi systems
Music industry applications
DVD-P/DVD-RW
Digital TV
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