EP2S60F484I4 Datasheet (PDF) - Altera Corporation
■ 15,600 to 179,400 equivalent LEs; see Table 1–1
■ New and innovative adaptive logic module (ALM), the basic
building block of the Stratix II architecture, maximizes performance
and resource usage efficiency
■ Up to 9,383,040 RAM bits (1,172,880 bytes) available without
reducing logic resources
■ TriMatrix
memory consisting of three RAM block sizes to implement
true dual-port memory and first-in first-out (FIFO) buffers
■ High-speed DSP blocks provide dedicated implementation of
multipliers (at up to 450 MHz), multiply-accumulate functions, and
finite impulse response (FIR) filters
■ Up to 16 global clocks with 24 clocking resources per device region
■ Clock control blocks support dynamic clock network enable/disable,
which allows clock networks to power down to reduce power
consumption in user mode
**注意 & Noted:
Because of wholesale price is different from sample price, our website cannot state. Please contact us online. As well as welcome you call us : 0755-83957301.We will offer a right price; Sometimes manufacturer's price is unstable, so we don't adjust price in time. if you feel price is a little high for you, just feel free to contact us for consultation. Thank you for your support !
由于批量與樣品的價(jià)格不同,網(wǎng)上無(wú)法統(tǒng)一注明,請(qǐng)您把采購(gòu)型號(hào)通過郵件或客服QQ2850151584發(fā)給我們,也可致電明佳達(dá)國(guó)內(nèi)銷售部:0755-83957301,由客服人員為您報(bào)價(jià);有時(shí)元件廠商價(jià)格稍許變動(dòng),本公司未能及時(shí)調(diào)整,如您覺得售價(jià)偏高,請(qǐng)與我們說明并適當(dāng)議價(jià);感謝支持!