Features

 Low ON resistance:

 80 ? (typical) at VCC − VEE = 4.5 V

 70 ? (typical) at VCC − VEE = 6.0 V

 60 ? (typical) at VCC − VEE = 9.0 V

 Logic level translation:

 To enable 5 V logic to communicate with ±5 V analog signals

 Typical ‘break before make’ built in

 Complies with JEDEC standard no. 7A

 ESD protection:

 HBM EIA/JESD22-A114-C exceeds 2000 V

 MM EIA/JESD22-A115-A exceeds 200 

 Multiple package options

 Speci?ed from −40 °C to +85 °C and from −40 °C to +125 °C

 

 

 

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